Algorithms and Lower Bounds for Threshold Circuits

A fundamental purpose of theory of computation is to understand differences between uniform computation and nonuniform one. In particular, Boolean circuit has been studied in an area of nonuniform computation models, because Boolean circuits are natural formalization of computer architecture and hardware. Boolean circuit is compared with uniform computation expressed as fixed size programs which run for an arbitrary input length. In the computational complexity theory, cost of non-uniform computation is measured through infinite family of Boolean circuits. Proving computational limitations of Boolean circuits is an extremely important and challenging task in the theoretical computer science. A remarkable recent result about satisfiability algorithms is a nontrivial algorithm for testing satisfiability of depth two sparse threshold circuits which have linear number of wires by Impagliazzo et. al. In this thesis, we construct a nontrivial algorithm for a larger class of circuits. We give a nontrivial circuit satisfiability algorithm for a class of circuits which may not be sparse in gates with dependency. Two gates in a circuit are dependent, if the output of the one is always greater than or equal to the other one. An independent gate set is a set of gates in which two arbitrary gates are not dependent. In our setting, the number of restrictions to bottom level gates is bounded above because of dependency of bottom gates. We first define some partial order on the set of bottom gates. Next, we define a problem: for given a pair of a circuit and a Hasse diagram relating with the circuit, output YES if and only if the circuit is satisfiable. Because of an upper bound on the expected number of restrictions to bottom level gates, the running time of the randomized algorithm is faster than the complexity of the trivial exhaustive search. Recently, Williams proved a separation between NEXP and ACC ◦ THR, where an ACC ◦ THR circuit has a single layer of threshold gates at the bottom and an ACC circuit at the top. Two main ideas of his strategy are a closure property of circuit class and an algorithm for counting satisfying assignments of circuits. In this thesis, we show that this general scheme based on these two ideas can be applied for a certain class of circuits with multilayer of threshold gates. The circuit class we give has the symmetric gate at the top and poly-log layers of threshold gates to which an extra condition on the dependency is imposed. We show that, if the size of a maximum independent gate set of each layer of threshold gates is at most n for sufficiently small γ > 0, then two key ingredients needed to apply his strategy can be established. We also give a result about lower bounds against NEXP, extending the results by Williams.